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AUTOMOTIVE MOSFET
Features
l l l l l l
Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free
HEXFET(R) Power MOSFET
D
IRF1405ZPbF IRF1405ZSPbF IRF1405ZLPBF
VDSS = 55V RDS(on) = 4.9m
PD - 97018
G S
Description
Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
ID = 75A
TO-220AB IRF1405ZPbF
D2Pak IRF1405ZSPbF
TO-262 IRF1405ZLPBF
Absolute Maximum Ratings
Parameter
ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100C Continuous Drain Current, VGS @ 10V ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Package Limited) IDM Pulsed Drain Current PD @TC = 25C Power Dissipation
Max.
150 110 75 600 230 1.5 20
Units
A
W W/C V mJ A mJ
Linear Derating Factor VGS Gate-to-Source Voltage EAS (Thermally limited) Single Pulse Avalanche Energyd EAS (Tested ) Single Pulse Avalanche Energy Tested Value IAR EAR TJ TSTG Avalanche CurrentA Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
h
270 420 See Fig.12a, 12b, 15, 16 -55 to + 175
g
C 300 (1.6mm from case ) 10 lbfyin (1.1Nym)
Thermal Resistance
Parameter
RJC RCS RJA RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Junction-to-Ambient (PCB Mount, steady state)i
Typ.
--- 0.50 --- ---
Max.
0.65 --- 62 40
Units
C/W
HEXFET(R) is a registered trademark of International Rectifier.
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1
07/22/05
IRF1405Z/S/LPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
55 --- --- 2.0 88 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.049 3.7 --- --- --- --- --- --- 120 31 46 18 110 48 82 4.5 7.5 4780 770 410 2730 600 910 --- --- 4.9 4.0 --- 20 250 200 -200 180 --- --- --- --- --- --- --- nH --- --- --- --- --- --- --- pF ns nC nA V
Conditions
VGS = 0V, ID = 250A
V/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 75A V S A VDS = VGS, ID = 250A VDS = 25V, ID = 75A VDS = 55V, VGS = 0V VDS = 55V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V ID = 75A VDS = 44V VGS = 10V VDD = 25V ID = 75A RG = 4.4 VGS = 10V
e
e e
Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = 25V = 1.0MHz
G
D
S
VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 44V, = 1.0MHz VGS = 0V, VDS = 0V to 44V
f
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- 30 30 75 A 600 1.3 46 45 V ns nC
Conditions
MOSFET symbol showing the integral reverse
G S D
p-n junction diode. TJ = 25C, IS = 75A, VGS = 0V TJ = 25C, IF = 75A, VDD = 25V di/dt = 100A/s
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes: Repetitive rating; pulse width limited by Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical max. junction temperature. (See fig. 11). repetitive avalanche performance. Limited by TJmax, starting TJ = 25C, L = 0.10mH This value determined from sample failure population. RG = 25, IAS = 75A, VGS =10V. Part not 100% tested to this value in production. recommended for use above this value. This is applied to D2Pak, when mounted on 1" square PCB Pulse width 1.0ms; duty cycle 2%. ( FR-4 or G-10 Material ). For recommended footprint and Coss eff. is a fixed capacitance that gives the same soldering techniques refer to application note #AN-994. charging time as Coss while VDS is rising from 0 to 80% VDSS .
2
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IRF1405Z/S/LPbF
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
ID, Drain-to-Source Current (A)
100
ID, Drain-to-Source Current (A)
BOTTOM
100
BOTTOM
4.5V
10
4.5V
10
20s PULSE WIDTH Tj = 25C
1 0.1 1 10 100
1 0.1 1
20s PULSE WIDTH Tj = 175C
10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
200
ID, Drain-to-Source Current ()
T J = 150C
100
Gfs, Forward Transconductance (S)
175 150 125 100 75 50 25 0 T J = 175C T J = 25C
10
T J = 25C
VDS = 25V 20s PULSE WIDTH
1 4 6 8 10 12
0
25
50
75
100 125 150 175 200
VGS, Gate-to-Source Voltage (V)
ID,Drain-to-Source Current (A)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance vs. Drain Current
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3
IRF1405Z/S/LPbF
100000
C oss = C ds + C gd
VGS, Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd
12.0 ID= 75A 10.0 8.0 6.0 4.0 2.0 0.0 VDS= 44V VDS= 28V
C, Capacitance(pF)
10000
Ciss
1000
Coss Crss
100 1 10 100
0
20
40
60
80
100
120
VDS, Drain-to-Source Voltage (V)
QG Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
1000.00
10000 OPERATION IN THIS AREA LIMITED BY R DS(on)
100.00
T J = 175C
10.00
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100 100sec 10 Tc = 25C Tj = 175C Single Pulse 1 1 10 1msec 10msec 100 1000
1.00
T J = 25C
0.10 0.0 0.5 1.0 1.5
VGS = 0V 2.0 2.5
VSD, Source-to-Drain Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRF1405Z/S/LPbF
150 125
ID, Drain Current (A)
2.5
Limited By Package
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 75A VGS = 10V
2.0
100 75 50 25 0 25 50 75 100 125 150 175 T C , Case Temperature (C)
1.5
1.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
T J , Junction Temperature (C)
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10. Normalized On-Resistance vs. Temperature
1
D = 0.50
Thermal Response ( Z thJC )
0.1
0.20 0.10 0.05 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE )
0.01
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.001 0.01 0.1 1 10
0.001 1E-006 1E-005 0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF1405Z/S/LPbF
15V
500
VDS
L
DRIVER
EAS , Single Pulse Avalanche Energy (mJ)
400
ID TOP 31A 53A BOTTOM 75A
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
300
A
0.01
200
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
100
0 25 50 75 100 125 150 175
Starting T J , Junction Temperature (C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy vs. Drain Current
10 V
QGS VG QGD
4.0
VGS(th) Gate threshold Voltage (V)
3.5
Charge
3.0
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
2.5
ID = 250A
2.0
50K 12V .2F .3F
1.5
D.U.T. VGS
3mA
+ V - DS
1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200
T J , Temperature ( C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage vs. Temperature
6
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IRF1405Z/S/LPbF
10000
Duty Cycle = Single Pulse
Avalanche Current (A)
1000
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses 0.01 0.05
100
10
0.10
1 1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
300
EAR , Avalanche Energy (mJ)
250
TOP Single Pulse BOTTOM 10% Duty Cycle ID = 75A
200
150
100
50
0 25 50 75 100 125 150 175
Starting T J , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy vs. Temperature
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IRF1405Z/S/LPbF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* dv/dt controlled by RG * Driver same type as D.U.T. * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
V DD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
RD
V DS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-V DD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRF1405Z/S/LPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
@Y6HQG@) UCDTADTA6IADSA A GPUA8P9@A &'( 6TT@H7G@9APIAXXA (A ((& DIAUC@A6TT@H7GAGDI@AA8A
Note: "P" in assembly line position indicates "Lead-Free"
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@
Q6SUAIVH7@S 96U@A8P9@ @6SA&A2A ((& X@@FA ( GDI@A8
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9
IRF1405Z/S/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
UCDTADTA6IADSA$"TAXDUC GPUA8P9@A'!# 6TT@H7G@9APIAXXA!A! DIAUC@A6TT@H7GAGDI@AAGA DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S A$"T 96U@A8P9@ @6SAA2A! X@@FA! GDI@AG
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S A$"T 96U@A8P9@ QA2A9@TDBI6U@TAG@69AAAS@@ QSP9V8UAPQUDPI6G @6SAA2A! X@@FA! 6A2A6TT@H7GATDU@A8P9@
10
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IRF1405Z/S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
@Y6HQG@) UCDTADTA6IADSG" "G GPUA8P9@A &'( 6TT@H7G@9APIAXXA (A ((& DIAUC@A6TT@H7GAGDI@AA8A Ir)AAQAAvAhriyAyvr vvAvqvphrAAGrhqArrA DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S 96U@A8P9@ @6SA&A2A ((& X@@FA ( GDI@A8
OR
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S 96U@A8P9@ QA2A9@TDBI6U@TAG@69AS@@ QSP9V8UAPQUDPI6G @6SA&A2A ((& X@@FA ( 6A2A6TT@H7GATDU@A8P9@
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IRF1405Z/S/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059)
0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
TO-220AB packages are not recommended for Surface Mount Application.
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 07/05
12
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Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/

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